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INTERNATIONAL JOURNAL OF NOVEL RESEARCH AND DEVELOPMENT (IJNRD)
An International Open Access Journal |   ISSN: 2456-4184 |  IMPACT FACTOR: 5.57

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Issue: November 2019

Volume 4 | Issue 11

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Paper Title: Design of High Performance Packet Classification Architecture for Secure Communication Networks Using VHDL
Authors Name: Faraaz Rana Siddiqui , Somiya Pathan , Sunidhi Bopte , Vaishanvi Joglekar , Prof. Rahil Khan
Author Reg. ID:
IJNRD_180234
Published Paper Id: IJNRD1901005
Published In: Volume 4 Issue 3, March-2019
Abstract: Packet classification is a crucial technique for secure communication and networking. Security tools and internet services use packet classification technique which involves checking of packets against predefined rules stored in a classifier. Performance of the available software solutions of classification is not desirable and efficient for wire speed processing in high speed networks. Ternary Content Addressable Memory (TCAM), Bit-Vector (BV), field split bit vector (FSBV) and StrideBV algorithm are hardware based packet classification algorithms. In this paper, we have proposed simple and memory efficient approach for packet filtering using Xnor gate instead of using lookup tables called XnorBV approach. Packet header fields of Internet protocol (IP) addresses and protocol layer are classified using Xnor gate against predefined ruleset which also support ternary bit pattern of ‘1’, ‘0’ and ‘*’ while port numbers of packet header support range match by comparing port numbers against lower bound and upper bound. Our proposed parallel pipelined architecture can sustain a high throughput of +100 Gbps and low latency. Proposed method is memory efficient than other existing techniques, also supports prefix, range and exact match without use of range to prefix conversion. Also proposed XnorBV architecture is independent of ruleset feature and supports multiple dimension classification.
Keywords: firewall; network intrusion detection system; packet classification; quality of services.
Cite Article: "Design of High Performance Packet Classification Architecture for Secure Communication Networks Using VHDL", International Journal of Novel Research and Development (www.ijnrd.org), ISSN:2456-4184, Vol.4, Issue 3, page no.25-29, March-2019, Available :http://www.ijnrd.org/papers/IJNRD1901005.pdf
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