Object-Oriented System-on-Network-on- Hip Template and Implementation
Anandaraj Shunmugam,
, Ramkumar Ramaswamy
Abstract-Network-on-chip (NoC) technology enables a new system-on-chip paradigm, the system-on network-on-chip (SoNoC) paradigm. One of the challenges in designing application-specific networks is modeling the on-chip system behavior and determining on-chip traffic characteristics. A universal object message level model for SoNoC was defined and an object-oriented methodology was developed to implement this model in hardware and software. The model supports “object to core” synthesis and “function invoking to network” mapping. A case study of an H.263 system verifies the model and methodology. System prototypes are easily built and on-chip traffic can be observed using the SoNoC model to provide real benchmarks for on-chip network design.
"Object-Oriented System-on-Network-on- Hip Template and Implementation", IJNRD - INTERNATIONAL JOURNAL OF NOVEL RESEARCH AND DEVELOPMENT (www.IJNRD.org), ISSN:2456-4184, Vol.2, Issue 11, page no.23-28, November-2017, Available :https://ijnrd.org/papers/IJNRD1711005.pdf
Volume 2
Issue 11,
November-2017
Pages : 23-28
Paper Reg. ID: IJNRD_170152
Published Paper Id: IJNRD1711005
Downloads: 000118801
Research Area: Engineering
Country: tuticorin, Tamil Nadu, India
ISSN: 2456-4184 | IMPACT FACTOR: 8.76 Calculated By Google Scholar | ESTD YEAR: 2016
An International Scholarly Open Access Journal, Peer-Reviewed, Refereed Journal Impact Factor 8.76 Calculate by Google Scholar and Semantic Scholar | AI-Powered Research Tool, Multidisciplinary, Monthly, Multilanguage Journal Indexing in All Major Database & Metadata, Citation Generator
Publisher: IJNRD (IJ Publication) Janvi Wave
