COMPARATIVE ANALYSIS OF CMOS AND ADIABATIC ECRL CIRCUITS
Varsha R D
, Dr. Rajashri Khanai
logic, Partially adiabatic, Fully adiabatic, PFAL, ECRL
Power consumption is of utmost importance in the field of semiconductor industry. Several techniques have been employed to reduce the power consumption in the electronic devices one of which is the adiabatic logic. There are two types of adiabatic circuits, partially adiabatic and fully adiabatic circuits. In this thesis work we have used partially adiabatic circuits. Positive Feedback Adiabatic Logic and Efficient Charge Recovery logic (ECRL) are the two prominent partially adiabatic logic styles. Several circuits were implemented using conventional CMOS and adiabatic ECRL logic and the performance of the circuits is compared in terms of power consumption, delay and transistor count. It is found that there is a significant difference in the parameters compared. The circuits are implemented in cadence virtuoso 6.1.5 and simulation is carried out in spectre MMSIM131.
"COMPARATIVE ANALYSIS OF CMOS AND ADIABATIC ECRL CIRCUITS", IJNRD - INTERNATIONAL JOURNAL OF NOVEL RESEARCH AND DEVELOPMENT (www.IJNRD.org), ISSN:2456-4184, Vol.2, Issue 11, page no.37-42, November-2017, Available :https://ijnrd.org/papers/IJNRD1711007.pdf
Volume 2
Issue 11,
November-2017
Pages : 37-42
Paper Reg. ID: IJNRD_170144
Published Paper Id: IJNRD1711007
Downloads: 000118797
Research Area: Engineering
Country: Belagavi, karnataka, India
ISSN: 2456-4184 | IMPACT FACTOR: 8.76 Calculated By Google Scholar | ESTD YEAR: 2016
An International Scholarly Open Access Journal, Peer-Reviewed, Refereed Journal Impact Factor 8.76 Calculate by Google Scholar and Semantic Scholar | AI-Powered Research Tool, Multidisciplinary, Monthly, Multilanguage Journal Indexing in All Major Database & Metadata, Citation Generator
Publisher: IJNRD (IJ Publication) Janvi Wave
